1. Field of the Invention
The present invention relates to a chip package, and more particularly, to a chip package having a lead frame serving as a heat sink. The invention also relates to a method of forming the chip package.
2. Background of the Related Art
A ball grid array (BGA) semiconductor package is widely used since the package is capable of having a large number of pins in a predetermined area. Also, the external terminals of the device are short, which helps to prevent them from being bent. Such a semiconductor package may be quickly mounted on a mother board through a reflow process, thereby reducing a manufacturing time.
As shown in FIG. 1, a background art BGA semiconductor package includes a printed circuit board (PCB) 1 having a plurality of metal patterns (not illustrated) formed therethrough. A semiconductor chip 2 having a plurality of bonding pads (not illustrated) is adhered on the PCB 1 by an adhesive 1a. Metal wires 3 electrically connect each bonding pad with a corresponding metal pattern in the PCB, and a molding epoxy 4 molds a predetermined area on the PCB 1 including the semiconductor chip 2 and the metal wire 3. A plurality of solder balls 5, which serve as external terminals, are adhered on the lower surface of the PCB 1. The metal patterns provide an electric path through the PCB to electrically connect the wires 3 on the upper side to the solder balls 5 on the lower side of the PCB 1.
FIG. 2 is a flow chart illustrating steps of a fabrication method for a background art BGA semiconductor package. As shown therein, the process includes: a sawing process for dividing a plurality of semiconductor devices which are formed in a wafer into individual semiconductor chips. Next, a die bonding process is performed to attach individual semiconductor chips on a PCB. A wire bonding process is performed for connecting a plurality of bonding pads of each semiconductor chip to a plurality of metal patterns of the PCB with a plurality of wires. Next, a molding process is performed to mold a predetermined area formed on the PCB, including the semiconductor chip and the wires with a molding epoxy. Finally, a ball bonding process is performed to bond solder balls on a lower surface of the PCB to serve as external output terminals.
Since the solder balls of the above-described BGA semiconductor package are located opposite to an active surface of the semiconductor chip (i.e., the upper surface of the semiconductor chip having bond pads), there is a limitation on the minimum size of the semiconductor package due to the height necessary to allow the wires to bend from the top of the chip down to the PCB.
Also, heat generated in the semiconductor chip is not effectively radiated outside the package. Accordingly, such a package is not suitable for a high-powered semiconductor device.